Benefits of TRITON-M

- TRITON-M supports H.264 baseline level 1.3 decoding and it has embedded MPEG4 encorder/decorder for video. 
  It can be reprogrammed to applications such as BSAC, AAC, AAC+ V1, AAC+ V2, MP3 and WMA and designed
  to easily execute audio functions of multimedia contents.
- H.264 and MPEG4 for video coding are embedded in hardware to maximize its performance and minimize power 
  consumption. H.264 standard-adopted video is designed to process 60 CIF frames per second so that it can 
  effectively implement multichannel decoding and PVR.
- In particular, TRITON-M has built-in ARM CPU which enables running various levels of software and OS Porting. 
  Diverse API and other applications can be installed in. It is equipped with 5-million pixel camera interface and 
  various peripherals to ensure favorable system concentration.
- High-performing LCD controller enables up to SVGA free size display and Image Enhancement can implement
  high-definition LCD display. It includes image filtering, OSD (On Screen Display), video format conversion and 
  others required for display so that it can enable post processing without any additional function.
- It supports PIP (Picture In Picture) and multi channel display. It has TV encoder that enables analogue TV-Out 
  without an independent chip.
- Low power consumption achieved through various power control schemes enables long-time mobile TV viewing  
  on handheld devices.


 Key features

ARM based architecture for optimal multimedia performance
   - ARM 926EJ core, 0.13um CMOS process
   - Max 200MHz@1.2V
   - Hardwired video CODEC
   - Proprietary external frame memory access scheme

Video CODEC
   - H.263 baseline CODEC at CIF 30fps
   - MPEG-4 SP@L3 CODEC at CIF 30fps
   - H.264 baseline decoder at CIF 60fps decoding
   - Dedicated hardwired video CODEC for H.264 & MPEG-4

Enhanced audio
   - ARM base fully programmable CODEC
   - BSAC / AAC / AAC+ V1, V2/ MP3 / OGG / WMA
   - MUSICAM decoder / AAC encoder

Camera interface
   - Up to 3Mega pixels interface
   - JPEG CODEC (S/W)

DMB interface
   - Various baseband interface(SPI, SSP, SSO)
   - Dual mode baseband interface
   - Outer decoding for error resiliency

Video Signal processing
   - Video format conversion
   - embedded LCD controller
   - Image filtering / Scaling / color conversion
   - Multiple picture overlay
   - Hardware cursor
   - 2/4/8bit OSD with alpha-blending
   - Power efficient LCD bypass mode
   - Up to SVGA display & manipulation

Electrical Characteristics
   * Operation condition
   - Supply voltage for logic core : 1.2V +/-0.2
   - External I/O interface : 1.8¡¾0.2/2.8¡¾0.3V/3.3¡¾0.3V

   * Package
   - 324 FBGA (15mmx15mm, 0.8 ball pitch)
   - 268 FBGA (9mmx9mm, 0.5 ball pitch)
   - 357 FBGA with SDRAM and Baseband (10mmx10mm, 0.5 ball pitch)